Search by Tags

WEC T20 / T30 BSP Release

 

The following table contains known issues, scheduled bug fixes, and feature improvements for the Tegra Windows CE BSPs and images.

Any schedules are not guaranteed, but reflect the current planning. The planning could be shifted due to priority changes.
Issues which are scheduled for a specific version (e.g. V1.3beta1) will be integrated in the mentioned version of the BSP.

We will update this table continuously in order to always provide the latest state of our development plan.

Odd beta versions, as 1.0b1 or 1.3b3, are internal releases only for testing. They are omitted from the table.

Clear Filter
Issue #StatusSubjectModuleSubsystemWinCE OS

2.0 bis (Release date: 2017-10-26)
In this release only the *.CFG files of the download bundle have been changed. Everything else (Images, BSP, Bootloader) remained the same as in the V2.0 release. The change in the *.CFG files affects only Apalis and Colibri T30 modules.

See more details in the issue description.
WC-1761New FeatureSet 533 MHz as default RAM timings on T30Colibri T30, Apalis T30RAMWEC7, WEC2013

Description: Due to some customer feedback we downgrade the default RAM clock from 800 MHz to 533 MHz. Higher RAM clocks caused higher power consumption. Depending on the use case this results in thermal issues. We will set the timing up to 800MHz again once we have implemented the RAM clock dynamic frequency switching (DFS) on the T30 RAM. If you still want to use the previous 800 MHz RAM timings remove the following lines from the *.CFG files: [general] t30_emc_clk=533000